Why a University of Illinois team is adding magnets to AI chips

Shaloo Rakheja and her team at the Center for Advanced Semiconductor Chips with Accelerated Performance (ASAP) wants to make energy-efficient chips, as soon as possible. The solution? Magnets, probably.

Training today’s AI algorithms requires heavy computational power from transistor-heavy computer chips, Rakheja, professor and researcher at the University of Illinois Urbana-Champaign’s Grainger Engineering College, explained. (Nvidia’s A100 chip has 54 billion transistors.)

Transistors switch between 1 and 0 states, performing AI-required calculations. Those calculations are stored in memory and pulled as needed; the information is sent over a (usually copper) wire when accessed, expending resources.

“If I can take a new material and make a memory element out of it that can sit right next to the processor, that could cut down the amount of time and energy,” Rakheja told IT Brew.

The engineering enthusiast sees ferroelectricity, which exhibits spontaneous electric polarization, and familiar magnetics as attractive possibilities.

“The idea would be: Can I find a new material, which can be scaled down to the nanoscale dimension, does not require as many as six transistors to build this memory, but still can bring the memory close to the compute node?”

Rakheja spoke with IT Brew about how to get the minds of industry and academia working together on the less conventional AI chip design.

Responses have been edited for length and clarity.

What are your motivations for this research?

The AI community, in particular, focuses a whole lot on performance…A lot less emphasis is placed on energy and sustainability, and I think that the community needs to include that in their assessment. So, when they say, “my AI model is performing with 99.99% accuracy,” I think it would be nice for them to mention the numbers for energy efficiency.”

What prevents mainstream use of ferroelectrics and ferromagnetics?

A lot of the technologies we are working with in academia are not as mature as silicon…Industry is always hesitant to incorporate completely new materials systems, because, [one], it’s not proven well enough, and two, it might be expensive. It might contaminate the already existing foundries. Now, however, I think industry is excited about these new materials and devices. We’re seeing a lot of industry/university partnerships develop, as a consequence of that—some of which is also supported by the CHIPS Act.

What collaboration efforts have you made with industry?

The industry/university cooperative research center called ASAP, or Advanced Semiconductor Chips with Accelerated Performance, is an excellent example of how public, private, and academic partnerships can work together. Companies are giving us funding to conduct some of the fact-finding research…we don’t want our devices and materials to stay like “unicorn” devices. We are working very closely with companies like Intel, IBM, AMD, TSMC, Synopsys, Raytheon, and national labs like MIT, Lincoln Labs, Sandia National Labs, to figure out what we need to do at this fundamental, pre-competitive stage, to bring this technology to a point where it can be transitioned or at least be integrated with silicon.

Is the conversation difficult with people synthesizing these new components?

It’s almost like computer architects are talking in their own language, I’m talking in my own language, the material scientist is talking in their own language. There is a huge impedance mismatch when it comes to bridging this gap…But I think this is what academia is really good at. I think we can all get together in a room and really put our brains together and think about how we can work together and speak the same language.